Sustainable Development Goals

Abstract/Objectives

Advancements in semiconductor technology have led to smaller transistors, increasing the impact of IR drop, which makes IR drop analysis crucial in chip design. However, this analysis is resource-intensive and time-consuming, requiring multiple simulation patterns for power integrity verification and reevaluation after engineering changes. This paper introduces a machine learning-based method to predict IR drop levels and offers an algorithm to minimize simulation patterns. The proposed approach can reduce the number of simulation patterns by around 50%, resulting in decreased analysis time while maintaining accuracy. This innovation aims to improve efficiency in IR drop analysis during the engineering change order process. © 2024 ACM.

Results/Contributions

With the advances in semiconductor technology, the sizes of transistors are getting smaller, which has led to an increasingly severe impact of IR drop. Consequently, this trend has amplified the significance of IR drop analysis within the realm of chip design. However, analyzing IR drop is resource-intensive and time-consuming, since numerous simulation patterns are required to verify the power integrity of circuits. Additionally, with every engineering change order (ECO) step, a reevaluation is necessary. In this paper, we propose a machine learning-based method to predict IR drop levels and present an algorithm for reducing simulation patterns, which could reduce the time and computing resources required for IR drop analysis within the ECO flow. Experimental results show that our approach can reduce the number of patterns by approximately 50%, thereby decreasing the analysis time while maintaining accuracy. © 2024 ACM.

Keywords

semiconductortransistorIR dropsimulation modelspower integrityengineering change ordermachine learningalgorithmanalysis timecomputational resources

Contact Information

王俊堯
wcyao@cs.nthu.edu.tw