High-density Via-RRAM was designed and developed in 16nm logic process, and the memory density could reach 0.1 (Gb/mm2) in the 1T10R architecture. Multi-Level Cell (MLC) was also verified, which could further increase the memory density of the RRAM.
Also, neuromorphic computing is the application of high-density memory. A single-layer latch and embedded artificial synaptic device (eASD) were designed and verified. Different weights of the states were represented by output currents. The architecture will be realized by Via-RRAM in the future.
Moreover, to further increase the memory density, in-situ growth of carbon material on copper wires with 100nm-width was developed, and the technique was verified on the FinFET BEOL chip. After replacing the carbon source, the process temperature reduces significantly to 400°C. The study about low-temperature in-situ growth of low-resistance carbon on sub-100nm width copper wire will continue developing in the future.